http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-104865756-B
Outgoing Links
Predicate | Object |
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classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-13452 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-13338 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-044 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136286 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1248 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1368 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1345 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0412 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-134309 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F3-041 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1343 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1333 |
filingDate | 2015-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2017-08-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2017-08-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-104865756-B |
titleOfInvention | Array base palte, display panel and display device |
abstract | The invention discloses a kind of array base palte, display panel and display device, including viewing area and the non-display area around viewing area, non-display area includes a plurality of first electrode lead and a plurality of second electrode lead, and the non-display area of array base palte includes:Substrate;It is arranged at the first conductive layer of substrate surface;It is arranged at the gate dielectric layer that the first conductive layer deviates from substrate side;It is arranged at the second conductive layer that gate dielectric layer deviates from substrate side;The dielectric constant for being arranged at the separation layer that the second conductive layer deviates from substrate side, thickness of the thickness more than gate dielectric layer of separation layer, and/or separation layer is less than the dielectric constant of gate dielectric layer;It is arranged at the 3rd conductive layer that separation layer deviates from substrate side;First electrode lead is arranged at the first conductive layer or the second conductive layer, and second electrode lead is arranged at the 3rd conductive layer, by reasonably connecting up, and greatlys save the wiring domain of array base palte. |
priorityDate | 2015-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Predicate | Subject |
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isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID426099546 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID6335610 |
Total number of triples: 22.