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filingDate 2014-11-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2018-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2018-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-104752337-B
titleOfInvention Semiconductor structure and forming method thereof
abstract Present disclose provides semiconductor structures and forming method thereof.The embodiment of the present invention is usually directed to the electronic component of such as semiconductor wafer, and more particularly relates to use two-sided three-dimensional (3D) layered architecture scheme of multiple semiconductor wafers of silicon through hole (TSV) and the arrangement of back wiring.In embodiment, the first wordline architecture can be formed on the front of IC chip, and the second wordline architecture formed on the IC chip back side is connected to by TSV in chip, so as to relocate to the wiring of the needs at the back side of IC chip.
priorityDate 2013-12-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 41.