| abstract |
The invention provides 3D integrated circuits and forming method thereof.A kind of integrated circuit structure includes package assembling, the package assembling further comprises the porous dielectric layer for having the non-porous dielectric layer of the first porosity and being contacted positioned at the non-porous dielectric layer and with the non-porous dielectric layer, and wherein the second porosity of porous dielectric layer is higher than the first porosity.Bond pad penetrates non-porous dielectric layer and porous dielectric layer.Dielectric barrier layer is located above porous dielectric layer and contacted with porous dielectric layer.Bond pad is exposed by dielectric barrier layer.Dielectric barrier layer has flat top.Bottom surface of the flat top of bond pad higher than dielectric barrier layer. |