http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-104282540-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28026 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4966 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-82345 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate | 2013-07-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2017-09-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2017-09-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-104282540-B |
| titleOfInvention | Transistor and forming method thereof |
| abstract | A kind of transistor and forming method thereof, the forming method of the transistor includes：Semiconductor substrate is provided；The first pseudo- grid structure is formed on Semiconductor substrate first area surface, the second pseudo- grid structure is formed on Semiconductor substrate second area surface；In the sidewall surfaces formation barrier layer of the described first pseudo- grid structure and the second pseudo- grid structure, the first insulating barrier containing oxygen element positioned at the barrier layer surface, the second insulating barrier positioned at first surface of insulating layer；The described first pseudo- grid structure and the second pseudo- grid structure are removed, the first groove and the second groove is formed；Remove the second recess sidewall surface barrier；In the barrier layer surface formation first grid structure of first groove inner wall；In the first surface of insulating layer formation second grid structure of second groove inner wall.The forming method of the transistor, in Semiconductor substrate first area and the transistor of second area formation different threshold voltages, processing step is simple, improves the performance of transistor. |
| priorityDate | 2013-07-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 37.