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filingDate 2014-08-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2017-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2017-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-104157687-B
titleOfInvention A kind of perpendicular rings grid tunneling transistor and preparation method thereof
abstract A kind of ring grid field effect transistor of combination vertical-channel, foreign peoples's impurity segregation and Schottky-barrier source/drain structure, including a ring-type semiconductor channel for vertical direction, one endless gate electrode, one ring-type gate dielectric layer, one source region, an impurity segregation area, a drain region, one impurity segregation area, a Semiconductor substrate;Wherein, source region is located at the bottom of vertical-channel, connects with substrate, and impurity segregation area is between source region and vertical-channel;Drain region is located at the top of vertical-channel, and impurity segregation area is between drain region and vertical-channel;Gate dielectric layer and gate electrode are annular in shape around firmly vertical-channel;Source region and drain region form Schottky contacts with raceway groove respectively;The impurity in the impurity segregation area and impurity segregation area is selected from foreign peoples's material, i.e.,:When the impurity in impurity segregation area is selected from p-type material, the impurity in impurity segregation area is selected from n-type material;When the impurity in impurity segregation area is selected from n-type material, the impurity in impurity segregation area is selected from p-type material.
priorityDate 2014-08-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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