http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-104126228-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y10-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2029-7858 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66439 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7842 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0669 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7848 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7851 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-045 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-165 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42392 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1033 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1079 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-775 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78618 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0673 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate | 2011-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2016-12-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2016-12-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-104126228-B |
| titleOfInvention | On-plane surface grid surrounds device and manufacture method thereof entirely |
| abstract | Illustrate that a kind of on-plane surface grid surrounds device and manufacture method thereof entirely.In one embodiment, device includes that substrate, described substrate comprise the top surface with the first lattice paprmeter.Embedded epitaxial source district and embedded epitaxial drain district are formed on the top surface of described substrate.Embedded epitaxial source district has second lattice paprmeter different from described first lattice paprmeter with embedded epitaxial drain district.The channel nanowire with the 3rd lattice is formed between embedded epitaxial source district and embedded epitaxial drain district, and couples with them.In one embodiment, the second lattice paprmeter is different from the first lattice paprmeter with the 3rd lattice paprmeter.Channel nanowire includes that the channel nanowire of bottommost, bottom grid spacer are formed on the top surface of the substrate below the channel nanowire of bottommost.Gate dielectric layer is formed on each channel nanowire and surrounding.Gate electrode is formed on gate dielectric layer, and around each channel nanowire. |
| priorityDate | 2011-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 41.