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filingDate 2012-11-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_74e10f81c61e3deaa6ca19b60bc1ce57
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publicationDate 2014-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-103839901-A
titleOfInvention Simplified algorithm about junction-to-case thermal resistance of IGBT stack structure
abstract The invention relates to a simplified algorithm about junction-to-case thermal resistance of an IGBT stack structure. The IGBT stack structure has seven layers of materials comprising a chip layer, an upper layer tin-soldered layer, a DBC upper layer metal layer, a DBC ceramic layer, a DBC lower layer metal layer, a lower layer tin-soldered layer and a substrate layer. Total thermal resistance is the sum of thermal resistance of the seven materials via series connection and is described as follows: the total thermal resistance Rth_total=Rth_chip+Rth_soder1+Rth_DBC_me1+Rth_DBC_ci+Rth_DBC_me2+Rth_soder2+Rth_base.
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