http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103730468-A

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c1e3d8364bf64e4ac6e1a9cd5df2bd54
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B10-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B99-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5283
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53209
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823475
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B10-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0207
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8244
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11
filingDate 2012-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_63a430e663d588c1fb95cad03b486bc9
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_258bb94fd54831be4cafaeed3940b244
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_95fb7b13bb755ca3191b79483f4fbcca
publicationDate 2014-04-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-103730468-A
titleOfInvention Semiconductor structure, forming method of semiconductor structure, SRAM memory unit and SRAM memorizer
abstract Provided are a semiconductor structure, a forming method of the semiconductor structure, an SRAM memory unit and an SRAM memorizer. One semiconductor structure comprises at least two adjacent transistors formed on a semiconductor substrate, gate electrodes of two adjacent transistors, an opening defined by a doping area located between the gate electrodes of the adjacent transistors and a conductive layer covering the bottom and the side wall of the opening. The other semiconductor structure comprises a first transistor, a second transistor, an opening defined by an insulating layer, a gate electrode layer of the insulating layer exposed out of the first transistor, a doping area of the second transistor and a gate electrode of the second transistor, and a conductive layer covering the bottom and the side wall of the opening, wherein the first transistor and a second transistor which are formed on the semiconductor substrate, the insulating layer of the gate electrode of the first transistor only covers one part of the gate electrode away from the doping area of the second transistor. The SRAM memory unit and the SRAM memorizer comprise the semiconductor structure. The area of the semiconductor structure can be decreased.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105514159-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105514159-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2015158305-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103956182-B
priorityDate 2012-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2005275043-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-5453400-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6013547-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2004178516-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-5668065-A
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID450968440
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID16727373

Total number of triples: 36.