http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103681604-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4966 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-82345 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66477 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate | 2012-09-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2017-11-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2017-11-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-103681604-B |
| titleOfInvention | Semiconductor devices with self-aligned contact hole and preparation method thereof |
| abstract | This application provides a kind of semiconductor devices with self-aligned contact hole and preparation method thereof.The semiconductor devices with self-aligned contact hole includes：Semiconductor substrate, at least two metal gates, etching barrier layer and dielectric layer, etching barrier layer is formed on the surface of metal gates, including the first etching barrier layer and the second etching barrier layer, dielectric layer is formed on etching barrier layer, including first medium layer and second dielectric layer.It is less than the structure of the first etching barrier layer upper surface by forming metal gates upper surface in this application so that produce difference in height between metal gates and the first etching barrier layer.And the second etching barrier layer is filled in the first groove by being formed between metal gates upper surface and the first etching barrier layer opposing metallic gate upper surface, improve the anti-etching power on metal gates top.Avoid during self-aligned contact hole is prepared, exposing metal grid causes to connect the phenomenon of short circuit between self-aligned contact hole and metal gates. |
| priorityDate | 2012-09-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID457707758 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID24261 |
Total number of triples: 17.