http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103681355-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02318 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31051 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66636 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66477 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7834 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-165 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6653 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66553 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate | 2013-12-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2016-04-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2016-04-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-103681355-B |
| titleOfInvention | Prepare the method for accurate SOI source-drain field effect transistor device |
| abstract | The present invention discloses a kind of method preparing accurate SOI source-drain field effect transistor device, comprises the steps: the active area forming device; Form the rhythmic structure of the fence of device; Form the doping of source and drain extension area, and form ground floor side wall in gate stack both sides; Form the source-drain structure of depression; Form accurate SOI source and drain separator; In-situ doped extension second semi-conducting material source and drain, and carry out annealing activation; False grid before then removing according to rear grid technique, re-start the deposit of high-k/metal gate; Form contact and metal interconnection.The method of the invention can be compatible with existing CMOS technology well, have the advantages that technique is simple, heat budget is less, compare traditional field-effect transistor, the accurate SOI source-drain field effect transistor device prepared according to the method for the invention effectively can reduce leakage current, reduces the power consumption of device. |
| priorityDate | 2013-12-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 48.