http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103515419-B

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filingDate 2012-11-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2017-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2017-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-103515419-B
titleOfInvention The gradient aluminium gallium nitride alloy and super-lattice buffer layer of III V group iii nitride layers on silicon substrate
abstract Method the present invention relates to integrated circuit and for manufacturing integrated circuit.Integrated circuit includes Lattice Matching structure.Lattice Matching structure can include first buffering area, second buffering area and by Al x Ga 1‑x N/Al y Ga 1‑y Superlattice structure of the N layers to formation.The invention provides the gradient aluminium gallium nitride alloy and super-lattice buffer layer of the III V group iii nitride layers on silicon substrate.
priorityDate 2012-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 29.