| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823456
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7823
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823456
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0649
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0922
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0882
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7834
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66734
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4236
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0865
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7813
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7825 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
| filingDate |
2013-03-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-10-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2017-10-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-103367448-B |
| titleOfInvention |
The manufacture method of semiconductor devices and semiconductor devices |
| abstract |
The invention discloses one kind while contact resistance rising is suppressed, the pressure-resistant technology near the end of groove portion is improved.Groove portion (GT) is set to be located at least between source electrode offset area and drain bias region when overlooking in the semiconductor layer, and when being arranged on vertical view from source electrode offset area towards the source drain direction in drain bias region on.Gate insulating film GI covering groove portions GT side and bottom surface.Gate electrode (GE) is at least located in groove portion (GT) when overlooking, and is contacted with gate insulating film (GI).Contact GC is contacted with gate electrode GE.Moreover, when overlooking, contact GC configurations are located in groove portion GT when deviating from the 1st direction vertical with source drain direction for the center line in the groove portion GT extended along source drain direction and overlooking. |
| priorityDate |
2012-03-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |