http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103107130-B

Outgoing Links

Predicate Object
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C09K13-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1362
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-77
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C09K13-00
filingDate 2012-10-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2016-01-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2016-01-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-103107130-B
titleOfInvention For array base palte and the manufacture method thereof of liquid crystal display, the method for etchant and formation metal wiring
abstract The present invention relates to the method for a kind of manufacture for the array base palte of liquid crystal display, a kind of method forming metal wiring, for the etchant of metal oxide semiconductor layer, and for the array base palte of liquid crystal display, particularly relate to the method for a kind of manufacture for the array base palte of liquid crystal display, comprising: a) on substrate, form gate electrode; B) on the substrate being formed with gate electrode, gate insulation layer is formed; C) on gate insulation layer, form the active layer be made up of metal-oxide semiconductor (MOS); D) source/drain electrodes is being formed by the active layer that metal-oxide semiconductor (MOS) is formed; And e) form the pixel electrode be connected with drain electrode, wherein c) be included on gate insulation layer and form metal oxide semiconductor layer, and using etchant etching metal oxide semiconductor layer, described etchant comprises hydrogen peroxide, fluorochemical and water.The present invention relates to a kind of method using described etchant to form metal wiring, relate to described etchant, and relate to the array base palte for liquid crystal display, described array base palte uses the method manufacture of above-mentioned manufacturing array substrate.
priorityDate 2011-11-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 44.