| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01049
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-014
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05098
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01033
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01082
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01074
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01073
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05025
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01006
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05096
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05087
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01029
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-10329
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-03
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01013
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0105 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-05
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-485
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-60
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 |
| filingDate |
2010-07-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2014-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2014-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-102237300-B |
| titleOfInvention |
Through-substrate via and fabrication method thereof |
| abstract |
A method for fabricating a through-substrate via structure. A semiconductor substrate is provided. A first via hole is etched into the semiconductor substrate. A spacer is formed on sidewall of the first via hole. The semiconductor substrate is etched through the first via hole to form a second via hole. The second via hole is wet etched to form a bottle-shaped via hole. An insulating layer is formed lining a lower portion of the bottle-shaped via hole. A first conductive layer is deposited within the bottle-shaped via hole, wherein the first conductive layer define a cavity. A bond pad is formed on a front side of the semiconductor substrate, wherein the bond pad is electrically connected with the first conductive layer. A back side of the semiconductor substrate is polished to reveal the cavity. The cavity is filled with a second conductive layer. |
| priorityDate |
2010-04-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |