| abstract |
An integrated power MOSFET device formed by a substrate (19, 65); an epitaxial layer (13; 68; 80, 81) of N type ; a sinker region (17b) of P type, extending through the epitaxial layer from the top surface and in electrical contact with the substrate; a body region (22), of P type, extending within the sinker region from the top surface; a source region (25), of N type, extending within the body region from the top surface, the source region delimiting a channel region (22a); a gate region (19); a source contact (30), electrically connected to the body region and to the source region; a drain contact (31), electrically connected to the epitaxial layer (13; 81); and a source metallization region (104), extending over the rear surface and electrically connected to the substrate and to the sinker region. |