| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6af9a57049d2d91c036d4f5ab49154cb |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7843
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8238 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 |
| filingDate |
2008-05-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2014-05-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d26c9f25058c05ca22dc704c6a161d52
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_205ff0b53a6a0d4babb4d5ac57e03694
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4fe2b8531ca1317f88b1204e9c03d356 |
| publicationDate |
2014-05-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-101919045-B |
| titleOfInvention |
Enhanced transistor performance of n-channel transistors by using an additional layer above a dual stress liner in a semiconductor device |
| abstract |
By forming an additional dielectric material (260), such as silicon nitride, after patterning dielectric liners (230, 240) of different intrinsic stress, a significant increase of performance of N-channel transistors (220A) may be obtained while substantially not contributing to a performance loss of the P-channel transistor (220B). |
| priorityDate |
2007-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |