| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4966 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-513
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28194 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-43
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2009-08-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2013-07-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c598f74960743a370d926185e50d9112
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f72c77e391182338369c1a1be39466ff
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_13cd1321bc6c911833cd2bc1ac6cf11c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b23aca9daa53f85e4c64d3ae52ad675b |
| publicationDate |
2013-07-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-101661882-B |
| titleOfInvention |
Semiconductor element and its manufacturing method |
| abstract |
The invention provides a semiconductor element and its manufacturing method. A high-k metal gate structure of the sSemiconductor element includes a buffer layer. The buffer layer may interpose an interface oxide layer and a high-k gate dielectric layer. In one embodiment, the buffer layer includes an aluminum oxide. The buffer layer and the high-k gate dielectric layer may be formed in-situ using an atomic layer deposition (ALD) process. The semiconductor element has advantages of reducing the local stress between the gate dielectric layer (such as high-k material) and an interface layer (such as oxide); decreasing the influence to the threshold voltage (Vt) owing to the gate line width and improving the narrow channel effect. |
| priorityDate |
2008-08-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |