Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f6d13b587d21aefc0445b0feef65b79e |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-1327 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-107 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-062 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-381 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T29-49158 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01Q1-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-0284 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01Q21-0087 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01Q23-00 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-46 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01Q21-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01Q1-38 |
filingDate |
2009-07-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6f111358908095b8922ae8c2f3a0757e |
publicationDate |
2010-01-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
CA-2671251-A1 |
titleOfInvention |
A method for making a three-dimensional multi-layered interconnect device |
abstract |
There is disclosed a method for making a three-dimensional interconnect device, the device comprising a plurality of interconnection layers. The method comprises a step of laminating a printed circuit board comprising a plurality of interconnection layers. The method comprises a step of inserting the printed circuit board in a three-dimensional mold. The method comprises a step of injecting a molding material into the mold, so as to form a three-dimensional structure encompassing the printed circuit board. The method comprises a step of metallizing a portion of the outer surface of the three-dimensional structure, so that it is connected with at least one interconnection layer of the printed circuit board. |
priorityDate |
2008-07-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |