http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-2302908-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a6fde6d72dd25cc51462310e98031ba7 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G05F3-265 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G05F3-26 |
| filingDate | 2000-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_69a7f8f720ff95e357ac935749ef0269 |
| publicationDate | 2001-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CA-2302908-A1 |
| titleOfInvention | Differential current mirror with low or eliminated differential current offset |
| abstract | The invention relates to a differential current mirror circuit with low or eliminated differential current offset. The circuit comprises first and second input transistors Q1i and Q2i whose physical layout is being matched and emitters connected together to a first reference voltage V ref1 through an input resistance means Ri; first and second output transistors Q1o and Q2o whose physical layout is being matched and emitters connected together to a second reference voltage V ref2 through an output resistance means R o; collector and base of the first (second) input transistor Q1i (Q2i) being connected to the base of the first (second) output transistor Q1o (Q2o) and to a first (second) input current terminal to which a first (second) input current i1i (i2i) is being supplied; and collector of the first (second) output transistor Q1o (Q2o) being connected to a first (second) output current terminal generating first (second) output current i1o (i2o). By using only one input and one output regeneration resistors and providing that the layout of the input and output transistors is matched in pairs, the output differential current offset of the circuitry is eliminated. A cascade of differential current mirror connected in series is also provided. |
| priorityDate | 2000-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 15.