http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-2240429-A1

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_26e69ef7b7bc98bfe778e419ccd664c9
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04W56-0035
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0993
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-099
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04B7-26
filingDate 1996-12-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f6c4c5a2ed2a21c23f3ab2535120e594
publicationDate 1997-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CA-2240429-A1
titleOfInvention Discrete phase locked loop
abstract A discrete phase locked loop and method for supporting global synchronization of data communications in a mobile communications system is disclosed. In order to provide for air frame synchronization, air frame data clocks and a synchronization signal must be phase locked to a global time reference signal. This is accomplished through a fully discrete phase locked loop in ASIC on software wherein a state machine is clocked by a high frequency, high accuracy, fixed frequency source already available in the radio terminal equipment. The state machine generates the required air frame data clocks and synchronization signals by completing a counter cycle. At regular intervals, this counter can skip, or double step, for one count to adjust the output phase closer to the phase of the reference signal. The interval for which this correction is maintained is settable by an interval counter. This implementation mimics an elliptic low pass filter.
priorityDate 1995-12-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 21.