http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-2171734-A1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L7-0274 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L7-027 |
| filingDate | 1994-07-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6ecb61b03234895eb38cbb62a39845b4 |
| publicationDate | 1996-02-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CA-2171734-A1 |
| titleOfInvention | High speed self-adjusting clock recovery circuit with frequency detection |
| abstract | A clock recovery circuit based upon an early-late gate approach is applied to high speed serial communication links using NRZ data. The circuit has no systematic phase offset and therefore requires no external phase adjustment circuits or mechanism. The circuit is used in high speed integrated receivers for applications including fiber optics, disk-drive read/write electronics, mobile communications and high rate twisted pair data transmission in multimedia systems. Quadrature samples (50) are obtained and held which follow the shape of the NRZ data transition as a function of phase offset. The data signal is passed through the limiter (52) giving rise to a sawtooth shaped phase error signal. A derivative of the error function is taken to provide a frequency error signal to provide for frequency detection and assistance in frequency acquisition of the phase lock loop circuit (54, 58, and 60) generating the recovered clock signal (Clock) from a variably controlled oscillator (60). |
| priorityDate | 1994-07-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.