http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-2164523-A1
Outgoing Links
Predicate | Object |
---|---|
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-01831 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-017563 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-013 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-018 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-013 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0175 |
filingDate | 1994-04-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_183fe5258cec0f8b1c63a6ee651162ae |
publicationDate | 1995-02-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CA-2164523-A1 |
titleOfInvention | Bicmos current mode driver and receiver |
abstract | An apparatus for reducing transmis-son delay tones when transmitting differen-tial signals in an integrated circuit along long interconnect lines (10, 11) includes a current mode line driver which converts the differ-ential signal to be transmitted into a signal that has a relatively low peak-to-peak volt-age and large differential current changes. A receiver responsive to differential current changes converts the signal back into an out-put differential signal having peak-to-peak voltages adaptable to subsequent logic stages. A feedback circuit (Q5, Q6) coupled to the interconnect lines (10, 11) and the receiver functions to clamp the interconnect lines (10, 11) to a predetermined voltage while allow-ing the output differential signal to have peak-to-peak voltages greater than the pre-determined voltage. |
priorityDate | 1993-08-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.