http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-2119284-C

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F30-33
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-25
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F17-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28
filingDate 1994-03-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1998-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f8674d1276cd624770a31b81bd617300
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_548f3a7103d570e6ec8f06c4ef5252ea
publicationDate 1998-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CA-2119284-C
titleOfInvention Logic simulator
abstract There is disclosed a logic simulator wherein a logical action analyzer (2) receives a net list (4) and macro cell data (5) and performs logical action analysis on a circuit to be simulated for each macro cell on the basis of signalchanges given from signal detection information of a signal change detector (1) such that, if a macro cell accepts an input signal of an indefinite value (X), the indefinite value (X) is replaced with a propagation logical expression based on the input signal of its immediately preceding macro cell for logical operation, whereby the logic simulator is enabled to perform logic simulation without reduction in degree of integration and efficiency of the logic circuit to be practically fabricated after logic simulation.
priorityDate 1993-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID4496
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID408976986

Total number of triples: 17.