| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_14c9ad767fb6d5e9dabfb770d4e82252 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-30072
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-3842 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-38
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-32 |
| filingDate |
1986-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
1989-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8047886aec8c7a8a18e34edeb289c3c4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_79e69035b04ef19f539a5c4b255bf1c5
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_01a1ef360dfa722a964165f1fa86140f |
| publicationDate |
1989-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CA-1256580-A |
| titleOfInvention |
Conditional operations |
| abstract |
ABSTRACT A method is described for conditional control over the execution of instructions within a central processing unit of a digital computer. The central processing unit has a pipelined architecture where the fetch and execute cycles are overlapped to optimize the efficient execution of instructions. This novel method for conditionally nullifying instructions optimizes the use of instructions fetched into the pipeline without introducing residual state information which could add delay and complicate error processing. |
| priorityDate |
1985-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |