http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-1231758-A
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-0751 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28 |
filingDate | 1985-06-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 1988-01-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_91ff7a34ecdc335324248987a2b16d7b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_70e96988c8001fc09a610287feb42d93 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3c8cab5be40cb683b9a89a978b87899b |
publicationDate | 1988-01-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CA-1231758-A |
titleOfInvention | Random logic error detecting system for differential logic networks |
abstract | ABSTRACT Random Logic Error Detecting System For Differential Logic Networks A system for testing a differential logic network is provided which includes a differential exclusive OR circuit having a plurality of inputs for receiving complementary signals from the differential logic network and first and second output terminals and means, e.g., a conventional exclusive OR circuit, for determining the voltage difference between the first and second output terminals to indicate the presence or absence of a fault or error in the differen-tial logic network under test. |
priorityDate | 1984-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Predicate | Subject |
---|---|
isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419578835 |
Total number of triples: 16.