| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_80787665b837ed3eb503bbcd27c0043a |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7781
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0605
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-80
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1029 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-338
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-73
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-778
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-80
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-812
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-331 |
| filingDate |
1984-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
1986-07-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_aed257ccad64fd41408fce858b884cf2
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a6c7b587ddaae94655e7f81095a530fd
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b3ea8a0753aa152263c69a546c71962a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_003d664c7e98c7307159a70c9698da39
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8eefa21581e1a68729c2c9b439159664
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_804bcf870d92a353bd4596c8b15265c4 |
| publicationDate |
1986-07-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CA-1208808-A |
| titleOfInvention |
Semiconductor device |
| abstract |
Abstract: A semiconductor device has a first semiconductor layer and a second semiconductor layer smaller in forbidden band gap than the first layer. These layers are arranged to form a heterojunction. There is a first electrode for controlling carriers generated at least in the vicinity of the heterojunction interface, and at least two further electrodes. The second layer is located between the first layer and the first electrode for controlling the carriers. Both the first and second layers contain an impurity at a concentration of at most 1015cm-3, and an impurity identical in conductivity type to the carriers is contained at a concentration of at least 1016cm-3 in regions located between the further electrodes and a region where the carriers are generated, so as to electrically connect the further electrodes and the carriers generated in the vicinity of the heterojunction interface under the first electrode for controlling the carriers. Elements of both the enhancement and depletion modes can thus be readily separately fabricated in the same integrated circuit. The structure also simplifies manufacture. |
| priorityDate |
1983-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |