http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-1206267-A

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_772c2a9944db674c84ffc0df83c36dbe
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-22
filingDate 1983-10-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1986-06-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8457d15f8b112ba061150232b83fb59e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3470f985b1854e1e8f188475c015080a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_563095fbccccd18894529f6062728879
publicationDate 1986-06-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CA-1206267-A
titleOfInvention Data processing system with microcode control for executing a plurality of instruction sets
abstract ABSTRACT A data processing system having separate kernel, vertical and horizontal microcode, separate loading of vertical microcode and a permanently resident kernel microcode, and a soft console with dual levels of capability. The system includes a processor having dual ALC and microcode processors, and an instruction processor. Also included are a processor incorporating a multifunction processor memory, a malfunction nibble shifter, and a high speed look-aside memory control.
priorityDate 1982-11-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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