http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-1191961-A

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d2051317369a779747701bc0ebe411a4
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F7-503
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F7-503
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F7-50
filingDate 1983-09-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1985-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f05cdde000d27f0fefed35e97addc449
publicationDate 1985-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CA-1191961-A
titleOfInvention Digital adder circuitry
abstract ABSTRACT OF THE DISCLOSURE Circuitry for generating a carry signal from a binary adder stage is described. The adder stage has terminals for a carry input, and two binary digit inputs. The carry signal is generated at a carry output terminal. A first switch means connects the carry input terminal to the carry output terminal when the two binary digit inputs are at different logic levels. Two serially coupled transistors are coupled between the carry output terminal and a source of positive supply potential, and have their control electrodes coupled to respective binary digit inputs. Two further serially coupled transistors are coupled between the carry output terminal and a source of negative supply potential, and have their control electrodes coupled to respective binary input digits.
priorityDate 1982-09-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 22.