http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-1114911-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_772c2a9944db674c84ffc0df83c36dbe |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-1081 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-24 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-52 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-124 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-46 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-177 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-24 |
filingDate | 1979-01-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 1981-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_135535c7cc94a2a7d632d2a3cc98645e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_563095fbccccd18894529f6062728879 |
publicationDate | 1981-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CA-1114911-A |
titleOfInvention | Data processing system using a separate input/output processor |
abstract | ABSTRACT OF THE DISCLOSURE A data processing system having a host processor, a host memory, a host memory management unit and an input/output bus and further including a separate input/output (I/O) processor with its own local memory for handling the transfer of data between I/O devices on its own I/O processor I/O bus and the host main memory. The I/O processor has the capability of directly ac-cessing main memory via the host standard data channel. The I/O processor has the capability of interrupting the host processor operation in a special way (by a "micro-interrupt" process) such that the host processor thereby re-allocates the contents of a selected memory allocation unit (MAP) of the host memory management unit faster than using standard interrupt routines. Such re-allocation then permits the I/O processor to transfer data directly to and from the host main memory via the re-allocated memory management unit without the need for further processing by the host processor, the I/O processor pro-viding a suitable identification of the selected MAP which is to be re-allo-cated. The system further prevents access to the host memory by any other I/O processor while a first I/O processor is performing a read-modify-write operation with respect to the host memory. |
priorityDate | 1978-01-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Predicate | Subject |
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isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID5283820 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419513924 |
Total number of triples: 26.