http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-1075822-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_772c2a9944db674c84ffc0df83c36dbe |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-423 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L13-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-42 |
filingDate | 1977-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 1980-04-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3f9d8a0f7c8f30ba92ddd1bab98f976c |
publicationDate | 1980-04-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CA-1075822-A |
titleOfInvention | I/o bus transceiver for a data processing system |
abstract | I/O BUS TRANSCEIVER FOR A DATA PROCESSING SYSTEM ABSTRACT OF THE DISCLOSURE There is disclosed an input/output system, employed within a data processing system that includes a central processing unit (CPU). The CPU includes improved input/output shift register structure or apparatus for interfacing with and I/means (bus structure). The I/O structure includes improved CPU transceiver and peripheral device transceiver apparatus. The device trans-ceiver interfaces with an improved device controller. In the preferred embodiment of the present invention, the CPU, CPU trans-ceiver, device transceiver, and device controller, all being constructed primarily from MOS technology, are each contained within a respective chip. Further features of the input/output system include capability for placement of multiple transceiver/ controllers and their respective peripheral devices at varying distances from the CPU by virtue of novel clock and data trans-mission means which maintains accurate processing of data regard-less of propagation delay, distortion, data skewing, etc., due to varying transmission distances and inherent limitations of MOS, bipolar, and other technology. |
priorityDate | 1976-02-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 25.