| abstract |
Provided is a method for driving a semiconductor memory device in which data is stored for a long period of time by using a transistor with low leakage current between a source and a drain in an off state as a writing transistor. In a matrix formed using a plurality of memory cells in which a drain of a writing transistor, a gate of an element transistor, and one electrode of a capacitor element are connected, The gate of the write transistor is connected to the write word line, and the other electrode of the capacitor is connected to the read word line. Then, the amount of charge stored in the capacitor is confirmed by changing the potential of the read word line, and if the amount of charge has decreased below the reference, the memory cell is refreshed. [Selection] Figure 2 |